PICMG 2.16 Overview Tutorial

PICMG® 2.16 Tutorial - continued

Specification Detail

PICMG 2.16 has been designed to vastly increase inter-board communication capabilities of subsystems within the chassis by moving data off the shared bus architecture of CompactPCI® and onto a high availability, high speed, switched 10/100/1000 Ethernet based network topology.

This enables all slots within the chassis to be interconnected by a deterministic, reliable and scalable point-to-point embedded network based on already established enterprise network industry standards/protocols. Using PICMG 2.16, throughput can be improved under some applications by as much as an order of magnitude, without affecting the legacy components or behavior of the shared CompactPCI bus.

There are two concepts underlying PICMG 2.16.

An Ethernet infrastructure is embedded in the CompactPCI midplane, accessed via the J3 connector. An Ethernet switching element will reside in one or more of the CompactPCI slots, interconnecting all the slots in the chassis.
All subsystems will operate as stand-alone "systems on a card" interfacing with each other through a network stack on top of Ethernet.

With these two underlying concepts, PICMG 2.16 offers the following benefits:

Increased performance/throughput
Architectural scalability/unlimited "virtual backplanes"
Increased reliability/backplane redundancy
Decreased-time to-market

Keep in mind that while PICMG 2.16 radically improves performance, scalability and reliability of CompactPCI, it preserves its mechanical, power and hot-swap attributes. PICMG 2.16 also leaves intact the H.110 telephony bus for systems supporting that standard. Components that support PICMG 2.16 for communications within the same chassis also can also be mixed with units relying on the CompactPCI bus. Because there is no need to change out subsystems built around legacy CompactPCI elements, developers can gradually grow systems capabilities seamlessly onto the PICMG 2.16 framework. This means that systems can be evolved in response to changing needs, without scrapping prior design work.

Fabric and Node Slots

Because of the nature of a Packet Switching Backplane the PICMG 2.16 specification adds Fabric and Node slot definitions to the standard CompactPCI System and Peripheral slot definitions. By combining Fabric, Node, System, and Peripheral capabilities, the Packet Switching Backplane supports many more applications than the standard CompactPCI backplane.

Fabric slots are the one or two slots in a chassis that switch packets between the Node slots (up to two Fabric slots may be supported in a 19 inch cPCI chassis). Each Fabric slot may support from one to twenty Node slots (see below) & 10/100/1000 Mbits and connection to the packet-switched backplane is done via 10-200 J3/J5 pins. Fabric slots are hot-swappable and the available bandwidth for each can be up to 2.5 Gbytes/sec.

P1-P5, Fabric Slot

P3 Fabric Slot Detail

P5 Fabric Slot Detail

Node slots are the remaining slots in the chassis that are attached/linked to one or both of the fabric slots (up to twenty Node slots may be supported in a 19 inch CompactPCI chassis). Any Node slot may support one or two PICMG 2.16 buses (Fabric slots) & 10/100/1000 Mbits and connection to the Packet Switching Backplane is done via 10 or 20 J3 pins. Node slots are hot-swappable and the available bandwidth for each can be up to 500 Mbytes/sec.

P1-P5, Node Slot

P3 Node Slot Detail

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